Silicon Laboratories Si2415 Spezifikationen

Rev. 0.8 7/04 Copyright © 2004 by Silicon Laboratories AN93AN93Si2493/Si2457/Si2434/Si2415/Si2404 Modem Designer’s GuideIntroductionThis application n

AN9310 Rev. 0.8Ringer NetworkR7 and R8 comprise the ringer network. Thesecomponents determine the modem’s on-hookimpedance at TIP and RING. These comp

AN93100 Rev. 0.8PCM/Voice 3,4,24,18,12 :U*YU71Power Control &Z 24 U6E[2, 1:0], U65[13]Pulse Dialing D 6, 8, 14 U37–U45, U4EQuick connect +PQC+PSSR

AN93Rev. 0.8 101PCM/Voice ModeThe Si3000 is used in conjunction with the Si2493/57/34/15/04 to transmit and receive 16-bit voice samples to andfrom te

AN93102 Rev. 0.8Figure 22. Si2457/Si3000 ConnectionTo use voice mode register U71 and U59 must beproperly configured. Setting U59 = 0001h enables the

AN93Rev. 0.8 103Table 76. Voice CommandsAT Commands PurposesAT:U71,11 Tell modem send/receive data in linear mod

AN93104 Rev. 0.8Voice Mode ExamplePerform the following steps:1. Connect hardware as shown in Figure 22. Note that the Si3000 Evaluation Board require

AN93Rev. 0.8 105SMS SupportShort Message Service (SMS) is a service that allowstext messages to be sent and received from onetelephone to another via

AN93106 Rev. 0.8Type II Caller ID/SAS DetectionWhen a call is in progress, the Subscriber Alerting Signal (SAS) tone is sent by the central office to

AN93Rev. 0.8 107The SAS tone varies between countries and requiresconfiguration of the user registers U9F – UA9. TheSAS_FREQ (U9F) register sets the

AN93108 Rev. 0.8AUSTRALIA CALLWAITING TONE425 0.2 – 0.2 – 0.2 – 4.4 U9F=0x0003UA0=0x0014UA1=0x0014UA2=0x0014UA3=0x01B8AUSTRIA WAITING TONE420 0.04 – 1

AN93Rev. 0.8 109CROATIA CALL WAITING TONE425 0.3 – 8.0 U9F=0x0003UA0=0x001EUA1=0x0320CYPRUS CALL WAITING TONE425 0.1 – 0.1 – 0.1 – 5.3 U9F=0x0003UA0=0

AN93Rev. 0.8 11Figure 3. Typical Loop Voltage LVCS Transfer FunctionFigure 4. Typical Loop Current LVCS Transfer FunctionTable 4. Loop Current Transfe

AN93110 Rev. 0.8GIBRALTAR WAITING TONE400 0.1 – 3.0 U9F=0x0001UA0=0x000AUA1=0x012CGREECE CALL WAITING TONE425 0.3 – 10.0 – 0.3 – 10.0 U9F=0x0003UA0=0x

AN93Rev. 0.8 111ISRAEL CALL WAITING TONE400 1x(0.15 – 10.0 – 0.15) U9F=0x0001UA0=0x000FUA1=0x03E8UA2=0000xFJAPAN CALL WAITING TONE I400x16/400 0.5 – 0

AN93112 Rev. 0.8KIRIBATI WAITING TONE425 0.1 – 0.2 – 0.1 – 4.7 U9F=0x0003UA0=0x000AUA1=0x0014UA2=0x000AUA3=0x01D6KOREA (Rep. of) WAITING TONE350+440 0

AN93Rev. 0.8 113NETHERLANDS WAITING TONE425 0.5 – 9.5 U9F=0x0003UA0=0x0032UA1=0x03B6NEW ZEALAND WAITING TONE I400+450 0.5 U9F=0x0001UA0=0x0032WAITING

AN93114 Rev. 0.8POLAND WAITING TONE425 0.15 – 0.15 – 0.15 – 4.0 U9F=0x0003UA0=0x000FUA1=0x000FUA2=0x000FUA3=0x0190PORTUGAL CALLWAITING TONE425 0.2 – 0

AN93Rev. 0.8 115SOUTH AFRICA CALL WAITING TONE400×33 0.4 – 4.0 U9F=0x0001UA0=0x0028UA1=0x0190SPAIN CALL WAITING TONE425 0.175 – 0.175 – 0.175 – 3.5U9F

AN93116 Rev. 0.8URUGUAY WAITING TONE425 0.2 – 0.2 – 0.2 – 4.4 U9F=0x0003UA0=0x0014UA1=0x0014UA2=0x0014UA3=0x01B8VANUATU CALL WAITING TONE425 0.3 – 10.

AN93Rev. 0.8 117Modem On HoldThe Si2493 supports modem-on-hold as defined by theITU-T V.92 specification. This feature allows aconnected Si2493 to p

AN93118 Rev. 0.8Receiving Modem On Hold RequestsIf Modem On Hold is enabled via the +PMH=1command, the Si2493 may be placed on hold by aremote modem.

AN93Rev. 0.8 119TestingThis section contains information about using theSi2493/57/34/15/04 built-in self-test features andsuggestions for board-level

AN9312 Rev. 0.8Hookswitch and DCTerminationThe hookswitch and dc termination circuitry are shownin Figure 2 on page 8. Q1, Q2, Q3, Q4, R5. R6, R7, R8,

AN93120 Rev. 0.8not only the functionality of the modem chipset afterassembly but also discrete parts and product-relatedsoftware. Therefore, finished

AN93Rev. 0.8 121Compliance TestingRegulatory compliance testing requires the modem tobe configured in specific ways and controlled to performspecific

AN93122 Rev. 0.8Homologation testing requires that the Si2493/57/34/15/04 signal output be measured for each modulation anddata rate. The AT&T3 co

AN93Rev. 0.8 123The AT+FCLASS=0 command must be sent before anyother analoop test or connection is made. The modemmust remain on-hook for a time progr

AN93124 Rev. 0.8Country Dependent SetupConfiguring the Si2493/57/34/15/04 for operation indifferent countries is done easily with AT commands. Nohardw

AN93Rev. 0.8 125Table 92 shows the AT command string that configuresthe ISOmodem for Japan caller ID.The following sections describe each CID mode.US

AN93126 Rev. 0.8DC TerminationThe ISOmodem offers a great deal of flexibility in settingdc termination. Several bits can be used to adapt toparticular

AN93Rev. 0.8 127Country Configuration TablesThe country configuration tables separate countries intogroups. These groups include countries with the sa

AN93128 Rev. 0.8Silicon Labs Country Parameter IndexCountry Type +GCI code (hex)+GCI supportComments PageAlgeriaCTR 2 130ArgentinaArgentina 7 132Austr

AN93Rev. 0.8 129New ZealandNZ 7E y 139Norway (TBR21 + ATAAB)CTR 82 y 130OmanOman 83 140PakistanPakistan 84 140ParaguayFCC 87 y 130PeruFCC 88 130Philip

AN93Rev. 0.8 13The MINI[1:0] bits select the minimum operational loopcurrent for the DAA, and the DCV[1:0] bits adjust theDCT pin voltage, which affec

AN93130 Rev. 0.8Country Register Settings for CTR/TBR21 ATAAB and CTR21 Type CountriesCountry Register Settings for FCC Type CountriesCountry Register

AN93Rev. 0.8 131Country Register Settings for Russia (GOST) Type CountriesCountry Register Settings for Singapore (TAS) Type CountriesU00 U01 U02 U03

AN93132 Rev. 0.8Country Register Settings for ArgentinaCountry Register Settings for AustraliaU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000

AN93Rev. 0.8 133Country Register Settings for BrazilCountry Register Settings for ChileU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 0000 0

AN93134 Rev. 0.8Country Register Settings for ChinaCountry Register Settings for EgyptU00U01U02U03U04U05U06U07U08U09U0AU0B0800 0000 0000 0000 0000 00A

AN93Rev. 0.8 135Country Register Settings for Hong KongCountry Register Settings for HungaryU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 0

AN93136 Rev. 0.8Country Register Settings for IndiaCountry Register Settings for IndonesiaU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 000

AN93Rev. 0.8 137Country Register Settings for JapanCountry Register Settings for JordanU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 0000 0

AN93138 Rev. 0.8Country Register Settings for LithuaniaCountry Register Settings for MalaysiaU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000

AN93Rev. 0.8 139Country Register Settings for MexicoCountry Register Settings for New ZealandU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000

AN9314 Rev. 0.8The OVL bit should be polled following billing tonedetection. When the OVL bit returns to 0, indicating thatthe billing tone has passed

AN93140 Rev. 0.8Country Register Settings for OmanCountry Register Settings for PakistanU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 0000

AN93Rev. 0.8 141Country Register Settings for PhilippinesCountry Register Settings for QatarU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 0

AN93142 Rev. 0.8Country Register Settings for RomaniaCountry Register Settings for SlovakiaU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 00

AN93Rev. 0.8 143Country Register Settings for South AfricaU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 7DAF C1D5 4000 8000 01C0 5629 CF51 C000

AN93144 Rev. 0.8Country Register Settings for TaiwanCountry Register Settings for ThailandU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 000

AN93Rev. 0.8 145Country Register Settings for TunisiaCountry Register Settings for UAEU00 U01 U02 U03 U04 U05 U06 U07 U08 U09 U0A U0B0800 0000 0000 00

AN93146 Rev. 0.8Intrusion/Parallel Phone Detection ExampleThe modem may share a telephone line with a variety ofother devices, particularly telephones

AN93Rev. 0.8 147To prevent polarity reversals from being detected as aloss of loop current, a debounce timer controlled by U-registers 50 and 51 is us

AN93148 Rev. 0.8To set the Si2457 to monitor loop current in the off-hookstate, the host would issue the following commands:Overcurrent Detection Exam

AN93Rev. 0.8 149sent initially).If an OK (dial tone present) was received after theATDTW;<cr>, the line requires pulse dialing. Pulse dialthe en

AN93Rev. 0.8 15Typical Application Schematic((&/.'5;&/.'&'B'(6&'$287,17B7;':5B5(6(7B5;'5&

AN93150 Rev. 0.8HDLC Example: Bit Errors on a Noisy LineBit errors can occur on an impaired line. The problem is determining and ignoring the spurious

AN93Rev. 0.8 15119 B1 received first flagBeginning of Packet19 B0 A spurious byte received with > 6 mark bits in a row, the modem is looking for HD

AN93152 Rev. 0.819 B2 A 1-bit error is received in an HDLC flag, the modem assumes a new single-byte packet. Since a 1-byte packet is invalid, 19 B2 i

AN93Rev. 0.8 153The following two steps will allow the spurious data and bit errors to be eliminated while preserving the valid data. 1. Ignore 19 B0.

AN93154 Rev. 0.8APPENDIX A—ISOMODEM® LAYOUT GUIDELINESLayout GuidelinesThe key to a good layout is proper placement ofcomponents. It is best to copy t

AN93Rev. 0.8 155c.C5, C6, C7 IGND return path should be direct.d.The IGND plane must not extend past Q4 and Q5.10. The traces from R7 to FB1 and from

AN93156 Rev. 0.8Si2493/57/34/15/04 Layout Check ListTable 101 is a checklist that the designer can use during the layout process to ensure all the rec

AN93Rev. 0.8 15716Distance from TIP and RING through EMC capacitors C8 and C9 to chassis ground is short.17There should be no digital ground plane in

AN93158 Rev. 0.8Module Design and ApplicationConsiderationsModem modules are more susceptible to radiated fieldsand ESD discharges than modems routed

AN93Rev. 0.8 159APPENDIX B—PROTOTYPE BRING-UP GUIDEIntroductionThis appendix provides help with the debugging of initialprototypes. Although most ISOm

AN9316 Rev. 0.8Bill of Materials: Si2493/57/34/15/04 ChipsetComponent Value Supplier(s)C1, C2 33 pF, Y2, X7R, ±20% Panasonic, Murata, VishayC3 10 nF,

AN93160 Rev. 0.8within 200 ms after the carriage return. The reset recovery time (the time between a hardware reset or the carriage return of an ATZ c

AN93Rev. 0.8 161evaluation board to the Si3018/10-side C1 pad on theprototype system. This connection is illustrated inFigure 32. Connect the phone li

AN93162 Rev. 0.8Figure 31. Test the Prototype ModemFigure 32. Test the Prototype Si3018/10 CircuitryHostControllerHostUARTSi24xx Si3018 DiscretesRS232

AN93Rev. 0.8 163Figure 33. Verify Prototype Si3018/10 FailureFigure 34. Si3018/10 Typical VoltagesToPhoneLineHostControllerHostUARTSi24xx Si3018 Discr

AN93164 Rev. 0.8Table 102. Resistance to Si3018/10 Pin 15Si3018/10 ResistancePin 1 >6MPin 2 >5MPin 3 >2MPin 4 1MPin 5 >5MPin 6 >5MPin 7

AN93INDEXRev. 0.8 165AAbsolute Current Level 86, 147ac Termination 9, 14, 80, 121Analog Output 17Answer 6, 29, 42, 50, 53, 60, 75, 121, 125Tone 75tone

AN93INDEX166 Rev. 0.8dc Termination 13–14, 80, 82, 87, 121, 126, 148dc Termination Control Bits 126DCD 46, 60, 84–85, 94, 96, 119DCE 19, 21–22, 92Defa

AN93INDEXRev. 0.8 167IntrusionBlocking 87, 147Detection 19, 83, 86–87, 99, 120–121, 146–147detection blocking 87Detection—On-Hook Condition 146Settlin

AN93INDEX168 Rev. 0.8Parallel Interface 1, 5, 18, 51–52, 95–99, 147Register 0 96Register 1 96Parallel Phone Detect 84–86, 94, 146–147Mask 84, 147Paral

AN93INDEXRev. 0.8 169switch-hook 5synchronous DCE 21System Interface 9TTaiwan 144TBR21 ATAAB and TBR21 Type Countries 130Termination 40–41, 80, 119tes

AN93Rev. 0.8 17Analog OutputFigure 8 illustrates an optional application circuit to support the analog output capability of the Si2493/57/34/15/04for

AN93170 Rev. 0.8Document Change ListRevision 0.5 to Revision 0.6Added Si2493 to title.Added V.92 information.Added V.44 information.Added and expa

AN93Rev. 0.8 171Notes:

AN93172 Rev. 0.8Contact InformationSilicon Laboratories Inc.4635 Boston LaneAustin, TX 78735Tel: 1+(512) 416-8500Fax: 1+(512) 416-9669Toll Free: 1+(87

AN9318 Rev. 0.8Software Design ReferenceThis section provides information about the architectureof the modem, the functional blocks, registers, and th

AN93Rev. 0.8 19Figure 9. Si2493/57/34/15/04 Functional Block DiagramControllerThe controller provides several vital functions includingAT command pars

AN932 Rev. 0.8TABLE OF CONTENTSSection PageHardware Design Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AN9320 Rev. 0.8Error CorrectionThe Si2493/57/34/15/04 ISOmodem can employ errorcorrection (reliable) protocols to ensure error-freedelivery of data se

AN93Rev. 0.8 21The synchronous access mode has additional featurescompared against the Legacy Synchronous DCE Mode.For new designs, use the newer sync

AN9322 Rev. 0.8The “n” in the /Zn and /Tn is a single-byte, host-definedtag that can be used to track multiple HDLC frames. To facilitate transmit flo

AN93Rev. 0.8 23V.80 ModeAs shown in Table 13, the synchronous access mode ischosen by using the AT+ES=6,,8 command setting. When using the synchronous

AN9324 Rev. 0.8Notes:1. U87[10] = 1 Can be used to limit the transparency characters in the receive direction, to these four cases only.2. The actual

AN93Rev. 0.8 25Given the example initialization settings shown inTable 14, after an ATDT command has been sent toestablish a connection, the modem res

AN9326 Rev. 0.8frame is terminated with an <EM> <flag> or <EM><err>. The host should also expect to occasionally seethe <EM

AN93Rev. 0.8 27The examples in Table 17 assume the modem is resetto its default condition. Each command is followed by acarriage return.The modem has

AN9328 Rev. 0.8This restriction also applies to all commands beginningwith the “+” character (eg. +VCID).For example, AT:U42,0022:U43,0010<CR> i

AN93Rev. 0.8 29Table 20. Basic AT Command SetCommand Action$Display Basic AT command mode settings (see text for details).AAnswer incoming call.A/Re-e

AN93Rev. 0.8 3Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54EEPROM Int

AN9330 Rev. 0.8I0Display Si2493/57/34/15/04 revision code.A=Revision A.B = Revision B, etc.I1Display Si2493/57/34/15/04 firmware revision code (numeri

AN93Rev. 0.8 31Q1Disable result codes. (Enable quiet mode.)SnS-Register operations. (See Table 32.)S$List contents of all S-registers.Sn?Display conte

AN9332 Rev. 0.8:UU-Register Write—This command writes to the 16-bit U-Registers. The format is AT:Uaa,xxxx,yyyy,zzzz,..., whereaa = user-access addres

AN93Rev. 0.8 33+DS44 =A,B,C,D,E,F,G,H,IControls V.44 data compression function*.A Direction0 No compression (V.42bis P0 = 0)1 Transmit only2 Receive

AN9334 Rev. 0.8+ESA = A,B,C,D,E,F,GSynchronous access mode control optionsA – Specifies action taken if an underrun condition occurs during transparen

AN93Rev. 0.8 35+GCI = XCountry settings - Automatically configure all registers for a particular country.XCountry9 AustraliaAAustriaF Belgium16 Brazil

AN9336 Rev. 0.8+GCI = ?List all possible country code settings.+IFC Options+IFC = A+IFC = A,BSpecifies the flow control to be implemented.A Specifies

AN93Rev. 0.8 37+PCW = XControls the action to be taken upon detection of call waiting.X Mode0 Toggle RI and collect type II Caller ID if enabled by +V

AN9338 Rev. 0.8+PMHT=X Controls access to MOH request and sets the timeout value.X Mode0 Deny V.92 MOH request.1 Grant MOH with 10 s timeout.2 Gran

AN93Rev. 0.8 39Extended AT CommandsThe extended AT commands, described in Tables 21–23, are supported by the Si2493/57/34/15/04.Table 21. Extended AT&

AN934 Rev. 0.8Country Register Settings for Jordan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137Country Register S

AN9340 Rev. 0.8&H3 V.34 only (33.6 kbps to 2400 bps).&H4 ITU-T V.32bis with automatic fallback (14.4 kbps to 300 bps) (default for Si2415).&am

AN93Rev. 0.8 41Figure 10. Phone Line Termination Circuit&X1 Automatic determination of telephone line type.Result code: WXYZnW: 0 = line supports

AN9342 Rev. 0.8Table 22. Extended AT% Command SetCommand Action%$ Display AT% command settings (see text for details).%B Report blacklist. See also S4

AN93Rev. 0.8 43%V2 Automatic Line Status Detection - Adaptive Method.Description: Before going off-hook with the ATD, ATO, or ATA commands, the Si2493

AN9344 Rev. 0.8The connect messages shown in Table 23 are sent when link negotiation is complete.Table 23. Extended AT\ Command SetCommand Action\$ Di

AN93Rev. 0.8 45\P3 Mark.\Qn Modem-to-DTE flow control.\Q0 Disable all flow control—This may only be used if the DTE speed and the line (DCE) speed are

AN9346 Rev. 0.8\T16 Autobaud On.4\T17 Autobaud Off. Lock at current baud rate.\U Serial mode—causes a low pulse (25 ms) on RI and DCD. INT to be the i

AN93Rev. 0.8 47Table 24. Result CodesNumeric4Meaning Verbal Response X0 X1 X2 X3 X4 X50 Command was successfulOK XXXXXX1 Link established at 300 bps

AN9348 Rev. 0.833 Overcurrent condition X2XXXXXX40 Blacklist is full BLACKLIST FULL (enabled via S42 register)XXXXXX41 Attempted number is black-liste

AN93Rev. 0.8 4982 MNP4 protocol PROTOCOL: ALTERNATE, +CLASS 4Set with \V command.83 MNP5 protocol PROTOCOL: ALTERNATE, +CLASS 55Set with \V command.84

AN93Rev. 0.8 5Hardware Design ReferenceThe Si2493/57/34/15/04 chipset family consists of a 24-pin TSSOP low-voltage modem device (Si2493/57/34/15/04)

AN9350 Rev. 0.8Table 25. Disconnect CodesDisconnect Code Reason8002 Handshake stalled.8 No dialtone detected.8008 No line available.9 No loop current

AN93Rev. 0.8 51Escape MethodsThere are four ways to escape from data mode andreturn to command mode once a connection isestablished. Three of these, “

AN9352 Rev. 0.8Figure 12. “9th Bit” Escape TimingSleep ModeThe Si2493/57/34/15/04 can be set to enter a low powersleep mode when not connected and aft

AN93Rev. 0.8 53The reset recovery time (the time between a hardwarereset or the carriage return of an ATZ command and thetime the next AT command can

AN9354 Rev. 0.8command, and the U-Registers from 0x0000 to 0x0079in the main memory space, accessed via the AT:Raa(register read) and the AT:Uaa (regi

AN93Rev. 0.8 55AT25080—AT25640 AtmelThe EEPROM must be between 8192 and 65536 bits insize and support the commands given in Table 28. TheEEPROM must a

AN9356 Rev. 0.8Figure 14. EEPROM Serial I/O TimingTable 29. EEPROM TimingParameter Symbol Min. Typ. Max. UnitEECLK period ECLK 1.0 — — µsEESD input se

AN93Rev. 0.8 57Detailed EEPROM ExamplesEEPROM Data is stored and read in hex ascii format ineight address blocks beginning at a specified hexaddress.

AN9358 Rev. 0.8AT:U67,000C,0010,0004<CR>AT:U4D,001<CR><CR><CR>This must be written to the EEPROM as ASCII hex ineight (8) addr

AN93Rev. 0.8 59Table 31. ASCII Chartdec hex Display dec hex Display dec hex Display dec hex Display0 00 <NUL> 32 20 <space> 64 40 @ 96 60

AN936 Rev. 0.8Table 2. Modulations and ProtocolsProtocol Function Si2493 Si2457 Si2434 Si2415 Si2404V.44 CompressionDV.42bis CompressionDDDDDV.42 Erro

AN9360 Rev. 0.8S-RegistersS-Registers are typically used to set modemconfiguration parameters during initialization and arenot usually changed during

AN93Rev. 0.8 6110 Carrier loss timer—The time a remote modem carrier must be lost before the Si2493/57/34/15/04 discon-nects. Setting this timer to 25

AN9362 Rev. 0.841 V.34 symbol rate - Symbol rate for V.34 when using the &T4 and &T5 commands.0 – 2400 symbols/second1 – 2743 symbols/second2

AN93Rev. 0.8 63U-RegistersU-Registers (user-access registers) are 16-bit registersdirectly written by the AT:Uaa command and read by theAT:R (read all

AN9364 Rev. 0.8U0F 0x000F DT4A0 Dial tone detect filter stage 4 biquad coefficients. 0x0400U10 0x0010 DT4B1 0x70D2U11 0x0011 DT4B2 0xC830U12 0x0012 DT

AN93Rev. 0.8 65U2E 0x002E BMTT Busy cadence minimum total time in seconds multiplied by 7200. 0x0870U2F 0x002F BDLT Busy cadence delta in seconds mult

AN9366 Rev. 0.8U4F 0x004F FHT Flash hook time—(ms units). 0x01F4U50 0x0050 LCDN Loop current debounce on time (ms units). 0x015EU51 0x0051 LCDF Loop c

AN93Rev. 0.8 67U87 0x0087 SAMCO This is a bit-mapped register 0x0000U9F10x009F SASF SAS frequency detection. 0x0000UA020x00A0 SC0 SAS cadence 0. Sets

AN9368 Rev. 0.8Table 34. Bit-Mapped U-Register SummaryReg. Name Bit 15Bit 14Bit 13Bit 12Bit 11Bit 10Bit 9Bit 8Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0

AN93Rev. 0.8 69U-Register Detailed DescriptionU-Registers are identified with the letter “U” followed bythe last two digits of the register’s hexadeci

AN93Rev. 0.8 7Modem and DAA OperationThis section describes hardware design requirementsfor optimum Si2493/57/34/15/04 modem chipsetimplementation. Th

AN9370 Rev. 0.8U17–U30 (Busy Tone Detect Filter Registers)U17–U2A set the biquad filter coefficients for stages 1–4 of the Busy Tone detect filter, an

AN93Rev. 0.8 71Table 37. BPF Biquad ValuesBPF Biquad ValuesStage 1 Stage 2 Stage 3 Stage 4 Output Scalar310/510A0 0x0800 0x00A0 0x00A0 0x0400 —B1 0x00

AN9372 Rev. 0.8K————0x0005400/440A0 0x0020 0x0200 0x0400 0x0040 —B1 0x7448 0x7802 0x73D5 0x75A7 —B2 0xC0F6 0xC0CB 0xC2A4 0xC26B —A2 0x4000 0x4000 0x40

AN93Rev. 0.8 73Example: The United States specifies a busy tone withon time from 450 to 550 ms and off time from 450 to550 ms. Thus, minimum ON time e

AN9374 Rev. 0.8U37–U45 (Pulse Dial Registers)Registers U37–U40 set the number of pulses to dialdigits 0 through 9, respectively. (See Table 40.) Theva

AN93Rev. 0.8 75U49–U4C (Ring Detect Registers)U49, U4A, U4B, and U4C set a representation of themaximum ring frequency, the difference between thehigh

AN9376 Rev. 0.8Table 43. Register U4D Bit Map Bit Name Function15 Reserved Read returns zero.14 TOCT Turn Off Calling Tone.0 = Disable.1=Enable.13 Res

AN93Rev. 0.8 77U4E (Pre-dial Delay Time Register)U4E sets the delay time between the ATD commandcarriage return and when the modem goes off-hook andst

AN9378 Rev. 0.8U53 (Modem Control Register 2)U53 (MOD2) is a bit-mapped register with all bits,except bit 15, reserved. (See Table 52). The AT&H11

AN93Rev. 0.8 79U65 (DAAC4)U65 (DAAC4) is a bit-mapped register with bits 3:0 and12:5 reserved. Bits 1:0 and 6:5 must not be changed ina read-modify-wr

AN938 Rev. 0.8EECLK/D5/RXCLKDCD_/D4ESC/D3AOUT/INT_TXD/WR_RESET_RXD/RD_CTS_/CS_/ALE_alt_RI_/D6/TXCLKINT_/D0RI_/D1EESD/D2CLKOUT/A0/EECSRTS_/D7VDDRINGTIP

AN9380 Rev. 0.8U66 (DAA Control Register 5, DAAC5)U66 (DAAC5) is a bit-mapped register with all bitsexcept bit 6 reserved. (See Table 53.) Bit 6 (FDT)

AN93Rev. 0.8 81Table 54. U67 Bit MapBit Name Function15:14 Reserved Read returns zero.13:12 MINI[1:0] Minimum Operational Loop Current.Adjusts the min

AN9382 Rev. 0.8U68 (ITC2)U68 is a bit-mapped register with bits 15:3 reserved.Reading these bits returns zero. Bits 4 and 2:0 are allread/write. (See

AN93Rev. 0.8 83U6C (LVS)U6C contains the line voltage status register, LVS, andresets to 0x0000. Bits 7:0 are reserved, and a readreturns zero.Modem C

AN9384 Rev. 0.8U70 (IO0)U70 controls escape and several indicator and detectormasks and provides several read-only status bits. (SeeTable 60.) Bits 5,

AN93Rev. 0.8 85Reset settings = 0x00009RIMRing Indicator Mask.0 = Change in RI does not affect INT.1 = RI low-to-high transition triggers INT.8DCDMDat

AN9386 Rev. 0.8U76 (GEN1)U76 provides control for parallel phone detect (PPD)intrusion parameters including the off-hook sample rate(OHSR), absolute c

AN93Rev. 0.8 87U77 (GEN2)U77 is a bit-mapped register that controls parametersrelating to intrusion detection and overcurrent detection.U77 resets to

AN9388 Rev. 0.8U79 (GEN4)U79 is a bit-mapped register. Bits 15:5 are reserved. Bits 4:0 represent the line voltage, loop current, or on-hook line moni

AN93Rev. 0.8 89U7A (GENA)U7A is a bit-mapped register. U7A resets to 0x0000.Bits 15:8 and 5:3 are reserved. Bit 7 (DOP) is used in a method to determi

AN93Rev. 0.8 9Power Supply and Bias Circuitry (Si2493/57/34/15/04)Power supply bypassing is important for the properoperation of the Si2493/57/34/15/0

AN9390 Rev. 0.8U7C (GENC)U7C is a bit-mapped register with bits 15:5 and bits 3:1reserved. U7C resets to 0x0000 with a power-on ormanual reset. Bit 4

AN93Rev. 0.8 91U87 SAM Synchronous Access Mode Configuration OptionsBit Name Function15:11 Reserved Read returns zero.10 MINT Minimal Transparency0 =

AN9392 Rev. 0.8Digital InterfaceThe Si2493/57/34/15/04 can be connected to a hostprocessor through either a serial or parallel interface.Direct connec

AN93Rev. 0.8 93Figure 16. Transmit Data BuffersFigure 17. Receive Data Buffers796 Words128 Words1024 Word Elastic Tx BufferSRAMCTS DeassertsCTS Asser

AN9394 Rev. 0.8Figure 18. Asychronous UART Serial Interface Timing DiagramThe DCD and RI pins can be used as a hardwaremonitor of carrier detect and r

AN93Rev. 0.8 95.Figure 19. UART Serial InterfaceParallel InterfaceThe parallel interface is intended for applications wherea serial interface is not a

AN9396 Rev. 0.8The parallel interface uses the FIFOs to buffer data thesame way as the serial mode. The main difference isthe additional control pins,

AN93Rev. 0.8 97Bit 1 (RTS) is a read/write bit that functions in theparallel mode like the RTS pin (Si2493/57/34/15/04,pin 8) in the serial mode. The

AN9398 Rev. 0.8Figure 20. Parallel Interface11 Bitsto Data BusCONTROLParallel I/FRegister 1MUXParallel I/FRegister 0A0(3)D0(16)D1(17)D2(18)D3(22)D4(23

AN93Rev. 0.8 99Programming ExamplesThe following programming examples are intended tofacilitate the evaluation of various modem features andserve as e