Silicon Laboratories SI5324 Betriebsanweisung Seite 11
- Seite / 107
- Inhaltsverzeichnis
- LESEZEICHEN
- AC701 Evaluation Board 1
- Revision History 2
- Table of Contents 3
- Chapter 1 5
- Artix-7 FPGA 9
- Encryption Key Backup Circuit 10
- I/O Voltage Rails 11
- DDR3 Memory Module 12
- Feature Descriptions 13
- Quad-SPI Flash Memory 16
- SD Card Interface 18
- USB JTAG Module 20
- Clock Generation 21
- System Clock Source 22
- User SMA Clock Input 24
- GTP Clock MUX 25
- 125 MHz Clock Generator 26
- GTP SMA Clock Input 26
- Jitter Attenuated Clock 27
- FMC HPC GBT Clocks 28
- GTP Transceivers 31
- PCI Express Edge Connector 33
- SFP/SFP+ Connector 34
- Ethernet PHY User LEDs 38
- USB-to-UART Bridge 39
- HDMI Video Output 40
- LCD Display (16 x 2) 43
- LCD Display Assembly 44
- C Bus Switch 45
- AC701 Board LEDs 46
- User I/O 47
- User GPIO LEDs 48
- GPIO DIP Switch 49
- User Rotary Switch 49
- User SMA Connectors 50
- LCD Connector 50
- PMOD Connector 50
- Switches 52
- FPGA Mezzanine Card Interface 54
- HPC Connector J30 55
- UCD90120A Description 59
- XADC Power System Measurement 64
- Power Management 67
- 1.5V/2=0.75V REFIN 68
- 3.3V POWER 68
- 1. See Table 1-32 69
- 2. See Table 1-33 69
- VCCO_VADJ Voltage Control 70
- Cooling Fan Control 71
- XADC Header 72
- Configuration Options 75
- Appendix A 77
- Configuration DIP Switch SW1 78
- Default Jumper Settings 79
- Appendix B 81
- Appendix C 83
- AC701 Board XDC File Listing 85
- Board Setup 99
- Appendix D: Board Setup 100
- Board Specifications 101
- UG952 (v1.1) January 30, 2013 102
- Additional Resources 103
- References 104
- Regulatory and Compliance 105
- Information 105
- Markings 106
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